New Grads Computer/Electrical Engineer — Physical AI Compute - FPGA EMBEDDED

About Xcelerium

Xcelerium is building the compute foundation for real-time Physical AI — intelligent systems that must process rich sensor data, make decisions, and act under demanding real-world constraints of latency, bandwidth, power, size, and reliability.

Our X²PU architecture is a unified polymorphic compute platform designed for workloads that span signal processing, AI/ML, linear algebra, optimization, control, and real-time decision-making. Xcelerium is developing this platform through full-stack hardware, software, and algorithm co-design for applications such as autonomous systems, robotics, wireless infrastructure, aerospace and defense, industrial automation, and edge AI.

Xcelerium is led by an experienced team of computer architects, chip designers, software leaders, and semiconductor executives with deep backgrounds in advanced SoCs, wireless, AI/ML, compute, and high-volume technology products. This is an opportunity to join a team building a new class of compute platform for real-world AI.

Location Primary location: Irvine, CA Alternate location: Santa Clara, CA This is an on-site role.

Job role groups Electrical Engineers, Computer Systems Engineers/Architects, Microsystems Engineers

Job Type

Full-time, new graduate / entry-level

Compensation & Benefits

Expected pay 80,000–100,000 USD per year Additional compensation Bonus Equity package Benefits MedicalDentalPaid time off401(k) match Vision

About the Role

As a New Grad Computer Engineer — Physical AI Compute, you will help build the software foundation for Xcelerium’s X²PU architecture.

This role sits at the intersection of computer architecture, compilers, SDKs, performance modeling, AI frameworks, and Physical AI applications. You will contribute to tools and software that allow developers to understand, program, optimize, and deploy workloads on a new X²PU architecture purpose-built for real-time Physical AI.

You will work with leading computer architects and expert chip designers to help define the software stack for a new class of real-time compute.

We are looking for highly curious, technically strong, and ambitious engineers with excellent programming skills, strong systems instincts, and the desire to learn quickly in a deep technical environment.

What You’ll Do

Build architectural models, simulators, and performance-analysis tools for the X²PU architecture.

Contribute to compiler, runtime, SDK, and developer-tooling infrastructure for programming and optimizing X²PU workloads.

Help map Physical AI workloads onto a new computer architecture, including signal processing, AI/ML, linear algebra, optimization, and control workloads.

Develop and optimize software kernels, libraries, APIs, examples, and application demos.

Work on software tools that help evaluate latency, throughput, memory movement, utilization, power, and performance tradeoffs.

Collaborate with architects, chip designers, firmware engineers, and application developers to connect hardware capabilities with software usability.

Prototype Physical AI applications in areas such as sensing, perception, autonomy, robotics, wireless, or real-time edge AI.

Integrate with or build around modern AI and compiler ecosystems where appropriate.

Write clean, well-tested, well-documented code that can grow into production-quality software infrastructure.

Participate in technical design reviews and help shape how developers program a new X²PUplatform.

What We’re Looking For B.S. or M.S. in Computer Engineering, Electrical Engineering, preferred otherwise a related field, or equivalent hands-on project/internship experience. Strong programming skills in C/C++ and Python. Strong fundamentals in data structures, algorithms, systems programming, debugging, and software engineering.

Familiarity with computer architecture concepts such as memory hierarchy, parallelism, instruction execution, vector/SIMD processing, accelerators, GPUs, DSPs, or embedded systems.

Familiarity with compilers, runtimes, SDKs, AI frameworks, or performance modeling.

Comfort working in Linux development environments using tools such as Git, build systems, debuggers, profilers, and test frameworks.

Strong analytical ability and interest in performance, efficiency, latency, and real-time system behavior.

Clear written and verbal communication skills, including the ability to explain technical tradeoffs.

High ownership, intellectual curiosity, and a desire to learn from experienced engineers.

RTL, System Verilog, or hardware design experience is not required for this role. Curiosity about hardware/software co-design and computer architecture is important.

Preferred Qualifications

Experience with compiler infrastructure such as LLVM, MLIR, TVM, IREE, Halide, XLA, or similar systems.

Experience with AI frameworks or model formats such as PyTorch, TensorFlow, JAX, ONNX, or related deployment tools.

Experience with performance modeling, architecture simulation, workload analysis, or benchmarking.

Experience optimizing software for GPUs, DSPs, CPUs, NPUs, FPGAs, or other accelerators.

Familiarity with CUDA, OpenCL, SYCL, SIMD/vector programming, embedded software, or low-level performance optimization.

Interest in real-time systems, robotics, autonomy, edge AI, signal processing, radar/RF sensing, control systems, or physical-world computing.

Experience with numerical computing, linear algebra, FFTs, filters, optimization algorithms, or ML inference.

Research, internship, open-source, compiler, systems, AI, robotics, or architecture project experience.

Projects We’d Be Excited to Discuss

We are especially interested in candidates who have built, optimized, or analyzed complex software or systems projects, such as:

A compiler pass, code generator, graph compiler, runtime, or domain-specific language.

An architectural simulator, performance model, profiler, or benchmarking framework. A CUDA, OpenCL, SIMD, DSP, or accelerator-optimized kernel. An AI model deployment, quantization, inference, or edge-AI project. A robotics, perception, sensing, control, or autonomous-systems application. A signal-processing pipeline involving FFTs, filters, beamforming, localization, tracking, or sensor fusion. An SDK, developer tool, API, library, or open-source software project. A research or class project involving computer architecture, compilers, machine learning systems, or embedded systems. Why Join Xcelerium

Work with leading computer architects and expert chip designers on a new X²PU architecture. Help build the compiler, SDK, modeling, and application software stack for X²PU. Contribute to a differentiated platform for real-time Physical AI and autonomy. Work across the full stack: architecture, compilers, runtime software, performance tools, AI frameworks, and applications.

Build software where latency, throughput, memory movement, power, and programmability all matter. Learn how advanced hardware and software are co-designed for production silicon. Join a team that values technical depth, first-principles thinking, clean code, thoughtful documentation, and high ownership. Equal Opportunity

Xcelerium is an equal opportunity employer. We are committed to building a team that reflects a wide range of backgrounds, experiences, and perspectives. We encourage candidates who are excited by our mission and believe they can contribute to apply. Position Details

Job title New Grads Computer Engineer Position type Job Work-Study program No

Location Requirements

**Location type **Onsite

Onsite location Irvine, California, United States · Santa Clara, California, United States

Time Requirements Schedule Full time Employment duration Permanent

Candidate Qualifications & Skill Work authorization This job requires US work authorization This job is open to candidates with Curricular Practical Training (CPT) This job is open to candidates with Optional Practical Training (OPT)

Skills Algorithms/C++Data Structures Debugging Python Systems Programming Degree level Bachelors/Masters School year Senior Latest graduation date June 2026 Major groups Computer Engineering Electrical Engineering *Minimum GPA 3.5 or Above Only