Historical snapshotmid (2–5 yrs)Captured Oct 26, 2026, 4:09 p.m.

ASIC Engineer, Design

Meta

Location
Sunnyvale, California, United States · Onsite
Compensation
Not stated in this snapshot
Employment
Full-time
Experience level
MID (2–5 years exp)
Specialization
ASIC Engineer, Metacareers.Com
Source
Metacareers.Com

Role Overview

Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration.

Responsibilities

  • Architecture exploration
  • Micro-architecture development
  • Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and debug
  • Collaboration with implementation team to close the design on timing and power

Qualifications

  • Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
  • 2+ years of experience in micro-architecture and RTL development for complex control and data path IPs OR Experience in SoC Micro-architecture, Design and Integration
  • RTL development using Verilog, System Verilog and HLS Experience in CPU, NOC, Memory and Peripheral Subsystems
  • Experience with Synthesis, Timing Closure and Formal Verification Methodology
  • Master’s or PhD degree in Electrical Engineering, Computer Science or related areas
  • Experience in data path development