Historical snapshotsenior (8+ yrs)Captured Nov 15, 2026, 1:14 a.m.

Senior ASIC Cloud Design Verification Engineer

Google

Location
Sunnyvale, CA, United States · Onsite
Compensation
$163,000 - $236,000 USD annually
Employment
Not stated
Experience level
SENIOR (8+ years exp)
Specialization
Test Engineer, Cloud, Google
Source
Google

Role Overview

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

  • Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.

Requirements & Qualifications

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 8 years of experience with design verification.
  • Experience in verifying digital logic at RTL using SystemVerilog/Universal Verification Methodology (UVM) for ASICs.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • 10 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
  • Experience with the full verification life-cycle.
  • Experience with three or more SoC projects/cycles and verifying interconnect IPs.

Application Instructions

Apply directly on Google Careers at Senior ASIC Cloud Design Verification Engineer.

Direct application sign-in: Submit Application

Note: In most instances, this position requires in-person interviews as part of the hiring process.